Syed M Raza
Graduate of Columbia University & Fordham University
Electric Piano Design using Xilinx FPGA’s
Brief Summary:
My team and I replicated the song Despacito through an FPGA Piano. We programmed a Diligent Basis 3 Artix-7 FPGA board to send the chosen frequencies aligning with the musical notes of the Despacito song. Used VHDL to code this project.
Video Demo
Walkthrough of the Code On Github:
This process sets up two arrays: one for the notes and one for the corresponding delays. The notes are encoded with 5 bits that represent note_next. The first bit represents the value of PB(3) and it controls if we want to raise the note to the next octave. The next four bits represent note_sel and control which note is played. In our code, you will see that it is twice the amount of notes required. This is due to the fact that we included a note ‘00000’, which is an empty note or plays nothing. The reason we did this is we needed to allow spaces between the notes to make it sound more realistic to the song, and in accordance with the sheet music. Our code also included variables of state and del_cnt, which are used to cycle through each of the notes. The del_cnt variable is used to count the delays between two notes. For each note, we continuously subtract by one to keep track of the delay per note. Once we hit 0, we are able to move to the next note in the array. This continues until the entire song is complete. Then we restart from the beginning of the song. Here, our del_cnt is reliant on the CLK signal, and is a clock based timer. After the del_cnt reaches 0, we are able to go to the next state, which keeps track of the current note that needs to be played and works like an index for the arrays.
